NXP Semiconductors /LPC13xx /ADC /STAT

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Interpret as STAT

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DONE0)DONE0 0 (DONE1)DONE1 0 (DONE2)DONE2 0 (DONE3)DONE3 0 (DONE4)DONE4 0 (DONE5)DONE5 0 (DONE6)DONE6 0 (DONE7)DONE7 0 (OVERRUN0)OVERRUN0 0 (OVERRUN1)OVERRUN1 0 (OVERRUN2)OVERRUN2 0 (OVERRUN3)OVERRUN3 0 (OVERRUN4)OVERRUN4 0 (OVERRUN5)OVERRUN5 0 (OVERRUN6)OVERRUN6 0 (OVERRUN7)OVERRUN7 0 (ADINT)ADINT 0RESERVED

Description

A/D Status Register. This register contains DONE and OVERRUN flags for all of the A/D channels, as well as the A/D interrupt flag.

Fields

DONE0

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

DONE1

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

DONE2

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

DONE3

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

DONE4

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

DONE5

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

DONE6

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

DONE7

These bits mirror the DONE status flags that appear in the result register for each A/D channel.

OVERRUN0

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

OVERRUN1

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

OVERRUN2

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

OVERRUN3

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

OVERRUN4

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

OVERRUN5

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

OVERRUN6

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

OVERRUN7

These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel. Reading ADSTAT allows checking the status of all A/D channels simultaneously.

ADINT

This bit is the A/D interrupt flag. It is one when any of the individual A/D channel Done flags is asserted and enabled to contribute to the A/D interrupt via the ADINTEN register.

RESERVED

Reserved.

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